1. Field of the Invention
This invention relates to a method of fabricating shallow trench isolation, and more particularly to a method of fabricating shallow trench isolation for high gapfilling and improving kink effect.
2. Description of Related Art
Shallow trench isolation is widely applied in fabricating semiconductor integrated circuits. Shallow trench isolation is formed in a substrate by forming a trench and filling the trench with insulation material. Such a trench can isolate devices in the substrate.
FIGS. 1A through 1D show the manufacturing progression of a shallow trench isolation according to the conventional method. Referring to FIG. 1A, a substrate 10 is provided. A silicon nitride layer 12 is formed over substrate 10. Then, a pattern is defined on silicon nitride layer 12 to form a trench 14.
Referring to FIG. 1B, an insulator layer 16, for example, a oxide layer, is deposited over a silicon nitrite layer 12 and fills the trench 14. Insulator layer 16 is deposited by for example, atmospheric chemical vapor deposition (APCVD), sub-atmospheric chemical vapor deposition (SACVD) or high density plasma chemical vapor deposition (HDP). Because the density of an insulator layer 16 formed by APCVD and SACVD is not dense enough, a high temperature annealing process is necessary to condense the insulator layer 16. After condensing, the density of an insulator layer 16 is not as dense as the density of an insulator layer formed by thermal oxidation. Similarly, the density of the insulator layer formed by HDP is not as dense as the density of an insulator layer formed by thermal oxidation.
Referring to FIG. 1C, an insulator layer 16 is partially removed by chemical mechanical polishing (CMP) using silicon layer 12 as a stop layer. Next, silicon nitride layer 12 is removed. A portion of the insulator layer 16 remains as a plug salient to the surface of the substrate 10.
Finally, referring to FIG. 1D, the plug of insulator layer 16 salient to the surface of the substrate 10 is etched by isotropic etching, for example, a 10:1 HF solution. Because isotropic etching etches the top and side of the salient plug of insulator layer 16 at the same rate, kinks 18 are formed at both sides of the shallow trench isolation. The kinks will reduce the character of the devices.
The kinks 18 at both sides of the shallow trench isolation must be generated by the conventional method, no matter what deposition method is used, for example, APCVD, ASCVD, or HDP. If the insulator layer 16 is formed by HDP, the faster the Ar flows, the better the gapfilling. But the high Ar flow will cause the clipping phenomenon. The clipping phenomenon causes devices fail. If low Ar flow is used to avoid the clipping phenomenon, the low gapfilling will occur and voids will form in shallow trench isolations.